How Do I Get a Bachelor of Computer Science Degree?

Liu Lei, male, was born in Urumqi, Xinjiang, and his ancestral home is Shenyang, Liaoning. He is currently an associate researcher at the State Key Laboratory of Computing Technology, Chinese Academy of Sciences, and the head of the Sys-Inventor research group. Liu Lei received a bachelor's degree in computer science and technology engineering, a master's degree in software system design engineering, and a doctorate in computer architecture engineering from Dalian University of Science and Technology, University of Science and Technology of China, and the University of Chinese Academy of Sciences (Computing Institute of Computing Technology, Chinese Academy of Sciences). And entered the work of the Institute of Computing in 2014. Prior to entering the Institute, Liu Lei had 5 years of software engineer, architect, and project management experience in the industry. Liu Lei's research involves computer system software, architecture and scalability, and system performance evaluation.

Liu Lei

(the scientist)

Liu Lei, male, was born in Urumqi, Xinjiang, and his ancestral home is Shenyang, Liaoning. He is currently an associate researcher at the State Key Laboratory of Computing Technology, Chinese Academy of Sciences, and the head of the Sys-Inventor research group. Liu Lei received a bachelor's degree in computer science and technology engineering, a master's degree in software system design engineering, and a doctorate in computer architecture engineering from Dalian University of Science and Technology, University of Science and Technology of China, and the University of Chinese Academy of Sciences (Computing Institute of Computing Technology, Chinese Academy of Sciences). And entered the work of the Institute of Computing in 2014. Prior to entering the Institute, Liu Lei had 5 years of software engineer, architect, and project management experience in the industry. Liu Lei's research involves computer system software, architecture and scalability, and system performance evaluation.

Since 2011, Liu Lei has led his research group to conduct a series of research in the direction of multi-core platform-oriented operating systems, memory resource utilization, and access optimization mechanism, and has led the development of mainstream multi-core, multi-channel servers, and other research Prototype of a memory resource management system for a storage system. The research results were published by the first author and corresponding author in ISCA, PACT, IEEE TC, ACM TACO, ICCD and other flagship academic conferences and publications, and have made an impact in the industry. Liu Lei has participated in or hosted many national projects (including 863, 973, Natural Science Foundation youth projects, etc.). In addition, he has also served as a program committee member, external reviewer, organizing committee member, and academic member of several international academic conferences. The reviewers of the journal have won honors such as the "Excellent Award of the Dean of the Chinese Academy of Sciences", "National Scholarship", "Excellent Graduate of National University of Science and Technology", and "Excellent Scientific Research Staff of the Institute of Computing Technology".

Chinese name

Liu Lei

Country of Citizenship

China

People

Mongolia

place of birth

Urumqi, Xinjiang

date of birth

September 1981

graduated school

University of Chinese Academy of Sciences, University of Science and Technology of China, Dalian University of Technology

Letter

communism

Major achievements

Propose memory bank / channel division, "vertical" management and optimization technologies to contribute to the field of memory management and optimization

representative work

The first co-corresponding author published high-level papers such as ISCA, PACT, IEEE TC, ACM TACO, etc.

Research areas

Modern operating system, new memory architecture

job title

Associate researcher

Some of the research results led by Liu Lei (first author) ^[1] , and collaborative (non-first) publications of the following papers ^[2] :

1. Memos: A Full Hierarchy Hybrid Memory Management Framework (Short Paper)

   Lei Liu , Hao Yang, Yong Li, Mengyao Xie, Lian Li, Chenggang Wu. The 34th International Conf. On Computer Design (ICCD) : 2016

2. Rethinking Memory Management in Modern Operating System: Horizontal, Vertical or Random?

   Lei Liu , Yong Li, Chen Ding, Hao Yang, Chengyong Wu. IEEE Transactions on Computers (TC) : 2016

3. Going Vertical in Memory Management

   Lei Liu , et al. ACM SIGARCH Computer Architecture News : October, 2014

4. Going Vertical in Memory Management: Handling Multiplicity by Multi-policy

   Lei Liu , Yong Li, Zehan Cui, et al. The 41st ACM / IEEE International Symposium on Computer Architecture (ISCA) : 2014 (acceptance rate: 17.8%, 9th part of mainland history)

5. BPM / BPM +: Software-based Dynamic Memory Partitioning Mechanisms for Mitigating DRAM Bank- / Channel-level Interferences in Multicore Systems

   Lei Liu , Zehan Cui, Yong Li, et al. ACM Trans. On Architecture and Code Optimization (TACO) : 2014

6. A Software Memory Partition Approach for Eliminating Bank-level Interference in Multicore Systems

   Lei Liu , Zehan Cui, Mingjie Xing, et al. The 21st ACM / IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT) : 2012 (acceptance rate: 18.8%)

7. WiseThrottling: A New Asynchronous Task Scheduler for Mitigating I / O Bottleneck in Large-Scale Datacenter Servers

   Fang Lv, Lei Liu , Huimin Cui, Lei Wang, Ying Liu, Xiaobing Feng, PC Yew (UMN). J. of Supercomputing: 2015 (Fang Lv is the corresponding author)

8. Dynamic I / O-Aware Scheduling for Batch-Mode Applications on Chip Multiprocessor Systems of Cluster Platforms

   Fang Lv, Huimin Cui, Lei Wang, Lei Liu , Cheng-Gang Wu, Xiao-Bing Feng, and Pen-Chung Yew (UMN). JCST: 2014 (Fang Lv is the corresponding author)

Research project introduction ^[1-2]

1. DRAM Bank and Channel Partitioning Mechanism (BPM / BPM +) on Real Systems ^[1]

This work begins with the contention and interference issue in main memory systems, and I approach it from the Operating System angle. In existing OS, memory resources are "blindly" allocated to applications (threads), leading to memory contentions in DRAM Banks in the root. Order to solve this problem, I use a software method that is an extension of well-known Page-Coloring to eliminate / mitigate the interferences across threads in main memory. The efforts are in PACT-2012 and ACM TACO-2014.

2. "Going Vertical" in Memory Management ^[1]

The "Gap" between architecture and operating system research brings challenges to computer systems. One typical issue is that the memory management mechanism in existing OS or runtime is oblivious to architecture details in memory systems, thus always leading to serious memory contentions and underutilization. In this project, the approach "Going Vertical" and "Vertical Partitioning" (having the idea of B / C / O-bits in ISCA-2014) are proposed to vertically mitigate the memory interferences in the entire memory hierarchy, as well as improve the memory utilization. Based on them, we further devise dynamic memory optimization and Curve-Vertical Partitioning approach to handle the dlerse memory behaviors exhibited by the appearing "memory-dlersity" workloads on multi- / many-core platforms. The efforts are published in ISCA -2014 and IEEE TC-2016 (Featured article invited).

3. Memos: Embracing Hybrid Memory Management in Modern Operating System ^[1]

In this project, we try to develop a memory-centric computing model, operating system, and architecture with hybrid and heterogeneous memory systems. Our goal is to provide a new computing technology, which is not limited by "Memory Wall" in the era marked as "DRAM technology scaling is ending".

Our recent work introduces memos , a framework that can flexibly and efficiently manage main memory system with horizontal DRAM-NVM (or Fast-Slow) architecture. Memos has several advantages: (1) Memos integrates several typical memory policies that can benefit the NVM performance and the overall memory utilization, such as memory bank partitioning / re-balancing and vertical memory optimization approaches. (2) Powered by an OS kernel level monitoring tool, memos can obtain the memory patterns online, and then leverage them to guide the memory preference data mapping. (3) Memos can schedule appropriate cache, DRAM, NVM, and channel resources together according to memory features (or user demands), and thus achieving a higher performance. We test memos with dlerse workloads, including Memcached. Current experimental results show that memos can benefit memory utilization, and contribute to system throughput and QoS.

4. SysMon ^[1]

A light-weight OS level system monitoring tool suite, which is able to profile the system on-the-fly and get the memory utilization (including cache utilization, memory footprint, approximate row-buffer locality, physical page level logic re-use time , access frequency, hot / cold features and write / read patterns) without any hardware or PMU supporting. SysMon is especially useful in VM and system level research work. Sysmon is now open source on Github. The beta version is introduced in ISCA-2014 and TC-2016.

Project participants ^[1] :

ICT: Lei Liu, Mingjie Xing, Zehan Cui (2011 ~ 2013), and Chenyong Wu (2010 ~ 2014).

PITT and VMware: Yong Li (2013 ~ 2016).

Students: Hao Yang, Mengyao Xie and Hongna Geng.

Financial support ^[1] :

NSFC under grant No. 61502452 (PI: Lei Liu).

Innovation research project support, SKL (PI: Lei Liu).

863 Program under grant No. 2012AA010902 (PI: Xiaobing Feng).

973 Program under grant No. 2011CB302504 (PI: Chengyong Wu).

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