Mnemonic description table Mnemonic | | Instructions | Number of bytes | Number of cycles |
|---|
(Data transfer instruction) |
MOV | A, Rn | Register transfer to accumulator | 1 | 1 |
MOV | A, direct | Direct address to accumulator | 2 | 1 |
MOV | A, @Ri | Accumulator transfer to external RAM (8 addresses) | 1 | 1 |
MOV | A, #data | Immediate data transfer to accumulator | 2 | 1 |
MOV | Rn, A | Accumulator transfer to register | 1 | 1 |
MOV | Rn, direct | Direct address transfer to register | 2 | 2 |
MOV | Rn, #data | Accumulator to direct address | 2 | 1 |
MOV | direct, Rn | Register transfer to direct address | 2 | 1 |
MOV | direct, direct | Direct address to direct address | 3 | 2 |
MOV | direct, A | Accumulator to direct address | 2 | 1 |
MOV | direct, @Ri | Indirect RAM transfer to direct address | 2 | 2 |
MOV | direct, #data | Immediate data transfer to direct address | 3 | 2 |
MOV | @Ri, A | Accumulator transfer to indirect RAM | 1 | 2 |
MOV | @Ri, direct | Direct address transfer to indirect RAM | 2 | 1 |
MOV | @Ri, #data | Immediate data transfer to indirect RAM | 2 | 2 |
MOV | DPTR, # data16 | 16-bit constant loaded into data pointer | 3 | 1 |
MOVC | A, @ A + DPTR | Code bytes are passed to the accumulator | 1 | 2 |
MOVC | A, @ A + PC | Code bytes are passed to the accumulator | 1 | 2 |
MOVX | A, @Ri | Transfer of external RAM (8 addresses) to the accumulator | 1 | 2 |
MOVX | A, @DPTR | Transfer of external RAM (16 addresses) to the accumulator | 1 | 2 |
MOVX | @Ri, A | Accumulator transfer to external RAM (8 addresses) | 1 | 2 |
MOVX | @DPTR, A | Accumulator transfer to external RAM (16 addresses) | 1 | 2 |
PUSH | direct | Direct address push on stack | 2 | 2 |
POP | direct | Direct Address Popup Stack | 2 | 2 |
XCH | A, Rn | Register and accumulator swap | 1 | 1 |
XCH | A, direct | Direct address and accumulator exchange | 2 | 1 |
XCH | A, @Ri | Indirect RAM and accumulator swap | 1 | 1 |
XCHD | A, @Ri | Indirect RAM and accumulator swap low 4 bytes | 1 | 1 |
(Arithmetic operation instructions) |
INC | A | Accumulator plus 1 | 1 | 1 |
INC | Rn | Add 1 to register | 1 | 1 |
INC | direct | Direct address plus 1 | 2 | 1 |
INC | @Ri | Indirect RAM plus 1 | 1 | 1 |
INC | DPTR | Data pointer plus 1 | 1 | 2 |
DEC | A | Accumulator minus 1 | 1 | 1 |
DEC | Rn | Decrement register | 1 | 1 |
DEC | direct | Direct address minus 1 | 2 | 2 |
| | | | |
DEC | @Ri | Indirect RAM minus 1 | 1 | 1 |
MUL | AB | Accumulator and B register multiplication | 1 | 4 |
DIV | AB | Accumulator divided by B register | 1 | 4 |
DA | A | Accumulator decimal adjustment | 1 | 1 |
ADD | A, Rn | Register and Accumulator Sum | 1 | 1 |
ADD | A, direct | Sum Direct Address and Accumulator | 2 | 1 |
ADD | A, @Ri | Sum of indirect RAM and accumulator | 1 | 1 |
ADD | A, # data | Sum Immediate and Accumulator | 2 | 1 |
ADDC | A, Rn | Register and Accumulator Sum (with Carry) | 1 | 1 |
ADDC | A, direct | Sum of direct address and accumulator (with carry) | 2 | 1 |
ADDC | A, @Ri | Sum of indirect RAM and accumulator (with carry) | 1 | 1 |
ADDC | A, # data | Sum Immediate and Accumulator (with Carry) | 2 | 1 |
SUBB | A, Rn | Accumulator minus register (with borrow) | 1 | 1 |
SUBB | A, direct | Accumulator minus direct address (with borrow) | 2 | 1 |
SUBB | A, @Ri | Accumulator minus indirect RAM (with borrow) | 1 | 1 |
SUBB | A, # data | Accumulator minus immediate value (with borrow) | 2 | 1 |
(Logical operation instructions) |
ANL | A, Rn | Register "AND" to Accumulator | 1 | 1 |
ANL | A, direct | Direct Address "AND" to Accumulator | 2 | 1 |
ANL | A, @Ri | Indirect RAM ANDed to Accumulator | 1 | 1 |
ANL | A, # data | "AND" the immediate number to the accumulator | 2 | 1 |
ANL | direct, A | Accumulator "AND" to direct address | 2 | 1 |
ANL | direct, #data | "AND" to immediate address | 3 | 2 |
ORL | A, Rn | Register OR to Accumulator | 1 | 2 |
ORL | A, direct | Direct address "or" to accumulator | 2 | 1 |
ORL | A, @Ri | Indirect RAM OR to Accumulator | 1 | 1 |
ORL | A, # data | OR immediately to the accumulator | 2 | 1 |
ORL | direct, A | Accumulator "or" to direct address | 2 | 1 |
ORL | direct, #data | OR immediately to the direct address | 3 | 1 |
XRL | A, Rn | Register XOR to Accumulator | 1 | 2 |
XRL | A, direct | Direct XOR to Accumulator | 2 | 1 |
XRL | A, @Ri | Indirect RAM XOR to Accumulator | 1 | 1 |
XRL | A, # data | Immediate XOR to the Accumulator | 2 | 1 |
XRL | direct, A | Accumulator XOR to Direct Address | 2 | 1 |
XRL | direct, #data | Immediate XOR to Direct Address | 3 | 1 |
CLR | A | Accumulator clear | 1 | 2 |
CPL | A | Accumulator negation | 1 | 1 |
RL | A | Accumulator rotates left | 1 | 1 |
RLC | A | Cyclic shift left with carry accumulator | 1 | 1 |
RR | A | Accumulator Cycle Right | 1 | 1 |
RRC | A | Cycle right with carry accumulator | 1 | 1 |
SWAP | A | Accumulator high and low 4-bit swap | 1 | 1 |
(Control transfer instruction) | |
JMP | @ A + DPTR | Unconditional indirect transfer to DPTR | 1 | 2 |
JZ | rel | Accumulator is 0 then branch | 2 | 2 |
JNZ | rel | Accumulator is 1 branch | 2 | 2 |
CJNE | A, direct, rel | Compare direct address and accumulator, unequal branch | 3 | 2 |
CJNE | A, # data, rel | Compare immediate and accumulator, unequal branch | 3 | 2 |
CJNE | Rn, # data, rel | Compare register and immediate, unequal branch | 2 | 2 |
CJNE | @ Ri, # data, rel | Compare immediate and indirect RAM, unequal branch | 3 | 2 |
DJNZ | Rn, rel | Register is decremented by 1. | 3 | 2 |
DJNZ | direct, rel | Minus 1 for direct address, branch if not 0 | 3 | 2 |
NOP | | No operation for short delays | 1 | 1 |
ACALL | add11 | Absolutely call a subroutine | 2 | 2 |
LCALL | add16 | Long call subroutine | 3 | 2 |
RET | | Return from subroutine | 1 | 2 |
RETI | | Return from interrupt service routine | 1 | 2 |
AJMP | add11 | Unconditional absolute transfer | 2 | 2 |
LJMP | add16 | Unconditional long transfer | 3 | 2 |
SJMP | rel | Unconditional relative transfer | 2 | 2 |
(Boolean instruction) | |
CLR | C | Clear carry | 1 | 1 |
CLR | bit | Clear Direct Addressing Bit | 2 | 1 |
SETB | C | Set carry | 1 | 1 |
SETB | bit | Set direct addressing bit | 2 | 1 |
CPL | C | Negated carry | 1 | 1 |
CPL | bit | Invert Direct Addressing Bit | 2 | 1 |
ANL | C, bit | Direct Addressing Bit "AND" to Carry | 2 | 2 |
ANL | C / bit | Invert AND of Direct Addressing Bit to Carry | 2 | 2 |
ORL | C, bit | Direct Addressing Bit "OR" to Carry | 2 | 2 |
ORL | C / bit | Invert the OR of the directly addressed bit | 2 | 2 |
MOV | C, bit | Direct addressing bit to carry | 2 | 1 |
MOV | bit, C | Carry bit to direct addressing | 2 | 2 |
JC | rel | Branch if carry is 1 | 2 | 2 |
JNC | rel | Branch if carry bit is 0 | 2 | 2 |
JB | bit, rel | Branch if direct addressing bit is 1 | 3 | 2 |
JNB | bit, rel | Branch if direct addressing bit is 0 | 3 | 2 |
JBC | bit, rel | Direct addressing bit will branch and clear this bit | 2 | 2 |
