What Is a Chip Resistor?

Integrated Circuit English: integrated circuit, abbreviated as IC; or microcircuit , microchip, chip / chip is a circuit in electronics (mainly including semiconductor devices, but also passive components) Etc.) are miniaturized and are often manufactured on the surface of semiconductor wafers.

Integrated circuits that make circuits on the surface of semiconductor chips

After the invention of the transistor and mass production, various solid-state semiconductor components such as diodes and transistors were used in large quantities, replacing

The most advanced integrated circuits are

There are many ways to classify integrated circuits.

See also: Semiconductor device manufacturing and integrated circuit design

Since the 1930s, semiconductors in the chemical elements of the periodic table have been considered by researchers such as William Shockley of Bell Labs as the most likely raw material for solid-state vacuum tubes. From copper oxide to germanium to silicon, raw materials were systematically studied in the 1940s and 1950s. Today, although some III-V valence compounds such as gallium arsenide are used in special applications such as light-emitting diodes, lasers, solar cells and the highest-speed integrated circuits, monocrystalline silicon has become the mainstream of integrated circuits. The method of creating defect-free crystals took decades.

Semiconductor integrated circuit process, including the following steps, and reused:

• Photolithography

• Etch

• Thin film (chemical vapor deposition or physical vapor deposition)

• Doping (thermal diffusion or ion implantation)

• Chemical mechanical planarization CMP

Use single crystal silicon wafer (or III-V, such as gallium arsenide) as the base layer, and then use lithography, doping, CMP and other technologies to make MOSFET or BJT components, and then use thin film and CMP technology to make wires This completes the chip fabrication. Due to product performance requirements and cost considerations, wires can be divided into aluminum processes (mainly sputter plating) and copper processes (mainly electroplating, see Damascene). The main process technologies can be divided into the following categories: yellow lithography, etching, diffusion, thin film, planarization, and metallization.

The IC consists of many overlapping layers, each of which is defined by video technology and is usually represented by a different color. Some layers indicate where different dopants diffuse into the base layer (become a diffusion layer), some define where additional ion implantation (implantation layer), some define the conductor (polysilicon or metal layer), and some define the connection between conductive layers ( Vias or contact layers). All components consist of a specific combination of these layers.

• In a self-aligned (CMOS) process, transistors are formed where all gate layers (polysilicon or metal) pass through the diffusion layer.

• The resistance structure, the aspect ratio of the resistance structure, and the surface resistivity determine the resistance.

• Capacitive structure, due to size limitation, can only produce very small capacitance on the IC.

• More rare inductor structures can be fabricated on chip or simulated by gyrators.

Because CMOS devices only conduct current to switch between logic gates, CMOS devices consume much less current than bipolar components such as bipolar transistors. Through the design of the circuit, multiple transistor tubes are drawn on a silicon wafer, and integrated circuits with different functions can be drawn.

Random access memory is the most common type of integrated circuit, so the highest density devices are memory, but even microprocessors have memory. Although the structure is very complex-the width of the chip has been reduced for decades-the layers of integrated circuits are still much thinner than they are. The fabrication of the component layers is very much like a photographic process. Although light waves in the visible spectrum cannot be used to expose component layers because they are too large. High-frequency photons (usually ultraviolet) are used to create patterns for each layer. Because each feature is so small, an electron microscope is a necessary tool for a process engineer who is debugging a manufacturing process.

Each device is tested before being packaged with an automatic test equipment (ATE). The testing process is called wafer testing or wafer probing. Wafers are cut into rectangular pieces, each called a "die". Each good die is soldered to aluminum or gold wires on "pads" and connected to the package. Pads are usually on the sides of the die. After packaging, the device performs a final inspection on the same or similar ATE used in wafer probing. The test cost can reach 25% of the manufacturing cost of low-cost products, but for low-output, large and / or high-cost equipment, it can be ignored.

In 2005, the cost of constructing a manufacturing plant (commonly referred to as a semiconductor factory, often abbreviated as fab , or fabrication facility) was more than $ 1 billion because most operations were automated. ^[1]

Manufacturing process

The complete chip manufacturing process includes chip design, wafer manufacturing, package manufacturing, and testing. The wafer manufacturing process is particularly complicated.

The first is the chip design. According to the design requirements, the "pattern" generated

Raw wafer of chips

The composition of the wafer is silicon. The silicon is refined by quartz sand. The wafer is purified by the silicon element (99.999%), and then these pure silicon are made into silicon ingots, which become the quartz semiconductor for the manufacture of integrated circuits Materials, and slicing them are the wafers needed for chip making. The thinner the wafer, the lower the production cost, but the higher the process requirements.

Wafer coating

Wafer coating film can resist oxidation and temperature resistance, and its material is a kind of photoresist.

Wafer lithography development, etching

The basic flow of the photolithography process is shown in Figure 1 ^[2] . The first is to apply a layer of photoresist on the wafer (or substrate) surface and bake it. The dried wafer is transferred to the lithography machine. Light passes through a mask to project the pattern on the mask onto the photoresist on the wafer surface to achieve exposure and excite photochemical reactions. The second baking of the exposed wafer, the so-called post-exposure baking, is a more complete photochemical reaction. Finally, the developing solution is sprayed on the photoresist on the wafer surface to develop the exposed pattern. After development, the pattern on the mask is retained on the photoresist. Gluing, baking, and development are all done in a homogenizer developer, and exposure is done in a photolithography machine. The homogenizer developer and the lithography machine are generally operated online, and the wafer is transferred between each unit and the machine by a robot. The entire exposure and development system is closed, and the wafer is not directly exposed to the surrounding environment to reduce the impact of harmful components in the environment on the photoresist and photochemical reactions ^[2] .

Figure 1 Basic flow of modern lithography process and detection steps after lithography

The process uses chemicals that are sensitive to UV light, which softens when exposed to UV light. The shape of the chip can be obtained by controlling the position of the shade. The silicon wafer is coated with a photoresist so that it will dissolve when exposed to ultraviolet light. At this time, the first part of the shade can be used to dissolve the part directly exposed to the ultraviolet light, and the dissolved part can be washed away by the solvent. So the rest is the same shape as the shade, and this effect is exactly what we want. This gives us the silicon dioxide layer we need.

Doped with impurities

Ions are implanted in the wafer to generate corresponding P and N semiconductors.

The specific process is to start from the exposed area on the silicon wafer and put it into the chemical ion mixture. This process will change the way the doped region conducts electricity so that each transistor can be turned on, off, or carry data. Simple chips can use only one layer, but complex chips usually have many layers. At this time, the process is continuously repeated, and different layers can be connected by opening windows. This is similar to the manufacturing principle of multilayer PCB boards. More complex chips may require multiple silicon dioxide layers. At this time, it is achieved by repeating photolithography and the above process to form a three-dimensional structure.

Wafer test

After the above several processes, lattice-like grains are formed on the wafer. The electrical characteristics of each die are tested by means of a pin test. Generally, the number of dies that each chip has is huge, and organizing a pin test mode is a very complicated process. This requires the mass production of models with the same chip specifications as possible during production. The larger the number, the lower the relative cost, which is also a factor why the cost of mainstream chip devices is low.

Encapsulation

The finished wafer is fixed, the pins are bound, and various packaging forms are produced according to the requirements. This is why the same chip core can have different packaging forms. For example: DIP, QFP, PLCC, QFN, etc. This is mainly determined by the user's application habits, application environment, market form and other peripheral factors.

Testing, packaging

After the above process flow, the chip manufacturing has been completed. This step is to test the chip, remove defective products, and package.

Chip package

The earliest integrated circuits used ceramic flat packages, which have been used by the military for many years because of their reliability and small size. Commercial circuit packaging quickly shifted to dual in-line packaging, starting with ceramics and then plastics. In the 1980s, the pins of VLSI circuits exceeded the application limits of DIP packages, which eventually led to the emergence of pin grid arrays and chip carriers.

Surface mount packages appeared in the early 1980s, and they became popular in the late 1980s. It uses a finer foot pitch and the pin shape is a seagull wing or J shape. Taking Small-Outline Integrated Circuit (SOIC) as an example, it has 30-50% less area and 70% less thickness than an equivalent DIP. This package has seagull wing-shaped pins protruding on two long sides with a pin pitch of 0.05 inches.

Small-Outline Integrated Circuit (SOIC) and PLCC packages. In the 1990s, PGA packages were often used in high-end microprocessors. PQFP and thin small-outline package (TSOP) become common packages for high pin count devices. Intel and AMD's high-end microprocessing are now moving from PGA (Pine Grid Array) packaging to Land Grid Array (LGA) packaging.

Ball grid array packages began to appear in the 1970s, and flip-chip ball grid array packages with more pins than other packages were developed in the 1990s. In the FCBGA package, the die is flipped up and down, and connected to the solder balls on the package through a base layer similar to the PCB instead of wires. The FCBGA package allows the input and output signal array (called the I / O area) to be distributed on the entire chip surface, rather than being limited to the periphery of the chip. In today's market, packaging is also an independent part, and packaging technology will also affect product quality and yield. ^[1]