What Is a Low-Dropout Regulator?
LDO is a linear regulator. Linear regulators use transistors or FETs that operate in their linear region, subtracting excess voltage from the input voltage of the application to produce a regulated output voltage.
LDO (Low Dropout) Regulator
Right!
- Chinese name
- LDO (Low Dropout) Regulator
- Solid
- Stabilizer
- Belongs to
- Linear regulator
- Features
- Low pressure drop
- LDO is a linear regulator. Linear regulators use transistors or FETs that operate in their linear region, subtracting excess voltage from the input voltage of the application to produce a regulated output voltage.
- The so-called voltage drop voltage refers to the minimum value of the difference between the input voltage and the output voltage required for the regulator to maintain the output voltage within 100mV of its rated value. Positive output voltage LDO (low dropout) regulators typically use power transistors (also known as pass devices) as the PNP. This transistor allows saturation, so the regulator can have a very low dropout voltage, usually around 200mV; compared to a conventional linear regulator using NPN composite power transistors, the voltage drop is around 2V. The negative output LDO uses NPN as its transfer device, and its operation mode is similar to that of a positive output LDO PNP device.
- Newer developments use CMOS power transistors, which provide the lowest dropout voltage. With CMOS, the only voltage drop across the regulator is caused by the ON resistance of the load current of the power supply. If the load is small, the voltage drop produced by this method is only tens of millivolts.