What Is Memory Protection?

The memory protection unit (MPU) is a kind of hardware that effectively protects system resources equipped in ARM, and provides a memory area protection function.

The memory protection unit (MPU) is a kind of hardware that effectively protects system resources equipped in ARM, and provides a memory area protection function.
Chinese name
Memory protection unit
Foreign name
Memory Protection Unit (MPU)

Memory protection unit meaning

Some embedded systems use multitasking operation and control. These systems must provide a mechanism to ensure that running tasks do not disrupt the operation of other tasks. That is to prevent system resources and other tasks from being illegally accessed. Embedded systems have specialized hardware to detect and restrict access to system resources. It can guarantee the ownership of resources. Tasks need to abide by a set of rules defined by the operating environment and maintained by hardware, and grant special permissions to monitor and control resource programs at the hardware level. A protected system actively prevents one task from using the resources of another task. Therefore, the use of hardware active monitoring systems provides better protection than coordinated and enhanced software processes.
The memory protection unit (MPU) is a kind of hardware that effectively protects system resources equipped in ARM, and provides a memory area protection function.

Memory protection unit implementation

MPUs in ARM processors use "regions" to manage memory cells. The domain is an attribute associated with the storage space, and the processor core saves these data in some registers of the coprocessor CP15. Usually, the number of domains is 8 and the numbers are from 0 to 7.
The size and start address of the field are stored in register c6 of CP15. The size can be any power of 2 from 4KB to 4GB. The starting address of a domain must be a multiple of its size. For example, the starting address of a domain defined as 4KB can be 0x12345000, and the starting address of a domain defined as 8KB can only be a multiple of 0x2000.
In addition, the operating system can assign more attributes to these domains: access permissions, cache, and write cache. The memory is based on the current processor mode (management mode or user mode). Access rights to these areas can be set to read / write, read-only, and inaccessible.
When the processor accesses a domain in main memory, the MPU compares the access rights attributes of the domain with the processor mode at that time. If the request meets the domain's access criteria, the MPU allows the kernel to read / write the main memory; if the memory request does not access the domain's access criteria, an exception signal will be generated.
The exception signal is sent to the processor core. The processor core executes an exception vector, and then jumps to the exception handler. The exception handler determines that the exception type is prefetch or data abort, and then jumps to the corresponding service routine according to the exception type. [1]

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