What is a transaction memory?

In the software, the transaction memory scheme is a multiple programming procedure that uses transactions that are like those used by the database. When two or more fibers try to approach the same data at the same time, many different undesirable situations can lead in cases where the result of the program depends on access to fiber access. Usually one order is required and in multithreading the locks are the predominant and easiest way to ensure that only one thread has access to a specific source at a time. The chateau can become permanent if there is an unexpected error and locks can bring unpredictable problems with concurrence, such as blocking or priority inversion. As the locks are very fine -grained, another problem includes a code ending mostly time between locking, context switching and unlocking. This is a fundamental problem because this may lead to the code to spend more time for these actions than to perform a different importantIt is a work in the program. On the other hand, coarse -grained locks can cause reduced processing and reduced concurrence.

Transaction memory problems are solved by advanced locks, including "block block" from C#, readings, plots, barriers, etc. One of the main priorities in terms of transaction memory is to have no locks and no unnecessary time processing time. It usually agrees that the shared data structure is without locks unless its operation is required to exclude mutual exclusion. Data structures that are shared and without locks avoid commonly related problems with standard locking techniques if they are highly concomitant in systems.

The

model of transaction coherence and consistency (TCC) is a new, new, proposed shared memory model. According to the model, the atomic transactions are always the basic units of the following: parallel work, memory coherence, communication and consumptionMemory reference. The TCC also facilitates parallel software by eliminating synchronization that uses standards or traffic lights. Through the TCC hardware, it also combines each notation from each area of ​​transactions into one packet to atomically send a packet to a memory state that is permanently shared. In addition to the simplified cohosses hardware, this means that the necessary low fin messages are reduced and some standard coaches are completely removed.