What Is a Phase-Locked Loop?

A phase locked loop is a negative feedback control system that uses a phase-synchronized voltage to tune a voltage-controlled oscillator to produce a target frequency. Anyone who has learned the principle of automatic control knows that this is a typical feedback control circuit. It uses an externally input reference signal to control the frequency and phase of the internal oscillation signal in the loop to achieve automatic tracking of the output signal frequency to the input signal frequency. For closed-loop tracking circuits. It is a method to stabilize the frequency in radio transmission. There are mainly VCO (Voltage Controlled Oscillator) and PLL IC (Phase Locked Loop Integrated Circuit). The voltage controlled oscillator gives a signal, one part as output, and the other part The phase frequency is compared with the local oscillator signal generated by the PLL IC. In order to keep the frequency unchanged, it is required that the phase difference does not change. If there is a change in phase difference, the voltage at the voltage output terminal of the PLL IC changes to control the VCO Until the phase difference is restored, the purpose of phase locking is achieved. Closed-loop electronic circuit capable of maintaining the determined relationship between the frequency and phase of the controlled oscillator and the input signal.

A phase-locked loop refers to a circuit or module that is used in a communication receiver. Its role is to process the received signal and extract the phase information of a certain clock from it. In other words, for the received signal, a clock signal is copied, so that the two signals are synchronized (or coherent) from a certain point of view. Since the imitation clock signal has a certain phase difference with respect to the clock signal in the received signal in the locked condition (that is, after the capture is completed), it is called a phase lock.

Phase-locked loop

DDS has the following advantages:

High frequency resolution, multiple output frequency points, up to N frequency points (N is the number of phase accumulators);

Frequency switching speed can reach us level;

The phase is continuous when the frequency is switched;

Can output broadband

Phase-locked loops were originally used to improve

Basic working principle of phase locked loop

The voltage-controlled oscillator gives a signal, part of which is used as an output, and the other part is compared with the phase of the local oscillator signal generated by the PLL IC through frequency division. Change, the voltage of the voltage output terminal of the PLL IC changes, to control the VCO until the phase difference is restored! To achieve the purpose of frequency locking! Closed-loop electronic circuit capable of maintaining the determined relationship between the frequency and phase of the controlled oscillator and the input signal. ^[2]

Phase-locked loop analog phase-locked loop working principle

The analog phase-locked loop is mainly composed of a phase reference extraction circuit, a voltage controlled oscillator, a phase comparator, and a control circuit. The voltage-controlled oscillator outputs an equal-amplitude signal close to the required frequency, and sends it to the phase comparator at the same time as the reference signal extracted from the signal by the phase reference extraction circuit. The frequency of the oscillator continuously changes in the direction of reducing the absolute value of the error, achieving phase lock, thereby achieving synchronization.

Working principle of digital phase-locked loop

The digital phase-locked loop is mainly composed of a phase reference extraction circuit, a crystal oscillator, a frequency divider, a phase comparator, and a pulse wipe gate. The frequency of the signal output by the frequency divider is very close to the required frequency, and it is sent to the phase comparator at the same time as the phase reference signal extracted from the signal. The comparison result shows that when the local frequency is high, an input is erased through the fill gate. The pulse of the frequency divider is equivalent to the reduction of the local oscillation frequency; on the contrary, if it is shown that the local frequency is low, a pulse is inserted between the two input pulses at the input of the frequency divider, which is equivalent to the increase of the local oscillation frequency to achieve synchronization. ^[1]