What Are the Different Types of Semiconductor Packaging?

Semiconductor packaging refers to the process of processing the wafers that pass the test to obtain independent chips according to the product model and functional requirements. The packaging process is: the wafer from the wafer front process is cut into small wafers (Die) after the dicing process, and then the cut wafer is glued to the corresponding islands of the substrate (lead frame) frame. Then, the ultra-thin metal (gold-tin-copper-aluminum) wire or conductive resin is used to connect the bond pads of the wafer to the corresponding leads of the substrate and form the required circuit; The individual chips are packaged and protected by a plastic case. After plastic packaging, a series of operations are performed. After the packaging is completed, the finished product is tested. It usually passes through the procedures of Incoming, Test, and Packaging.

Semiconductor package

The semiconductor production process consists of wafer manufacturing, wafer testing, chip packaging, and post-package testing. After molding, a series of operations are performed, such as Post Mold Cure, Trim & Form, Plating, and printing. The typical packaging process is: dicing, packaging, bonding, plastic sealing, flashing, electroplating, printing, ribbing, molding, appearance inspection, finished product testing, packaging and shipment.

Features and advantages of various semiconductor packaging forms:

DIP dual in-line package

DIP (DualIn-line Package) refers to integrated circuit chips packaged in dual in-line packages. Most small and medium-sized integrated circuits (ICs) use this package, and the number of pins generally does not exceed 100. The CPU chip in the DIP package has two rows of pins and needs to be inserted into a chip socket with a DIP structure. Of course, it can also be directly inserted on a circuit board with the same number of solder holes and geometrical arrangement for soldering. When inserting or removing a DIP packaged chip from the chip socket, be careful to avoid damaging the pins.

DIP package has the following characteristics:

1.Suitable for through-hole welding on PCB (printed circuit board), easy to operate.

2. The ratio between the chip area and the package area is large, so the volume is also large.

The 8088 in Intel series CPUs adopts this packaging form. Cache and early memory chips are also this packaging form.

BGA ball grid array package

With the development of integrated circuit technology, packaging requirements for integrated circuits have become more stringent. This is because the packaging technology is related to the functionality of the product. When the frequency of the IC exceeds 100MHz, the traditional packaging method may produce the so-called "CrossTalk" phenomenon. When the IC pin number is greater than 208 Pins, the traditional packaging method has Its difficulty. Therefore, in addition to using QFP packaging, most high-pin count chips (such as graphics chips and chipsets) are now using BGA (Ball Grid Array Package) packaging.

BGA package

technology. BGA has become the best choice for high-density, high-performance, multi-pin packages such as CPUs and south / north bridge chips on motherboards.

BGA packaging technology can be further divided into five major categories: 1. PBGA (Plasric BGA) substrate: generally a multilayer board composed of 2-4 layers of organic materials. Among Intel series CPUs, Pentium II, III, and IV processors use this package.

2.CBGA (CeramicBGA) substrate: It is a ceramic substrate. The electrical connection between the chip and the substrate is usually installed by flip chip (FC). Among Intel series CPUs, Pentium I, II, and Pentium Pro processors have all used this package.

3. FCBGA (FilpChipBGA) substrate: rigid multilayer substrate.

4. TBGA (TapeBGA) substrate: The substrate is a strip-shaped soft 1-2 layer PCB circuit board.

5.CDPBGA (Carity Down PBGA) substrate: refers to the chip area (also known as cavity area) with a square low depression in the center of the package.

The BGA package has the following characteristics:

1. Although the number of I / O pins increases, the distance between the pins is much larger than the QFP packaging method, which improves the yield.

2. Although the power consumption of BGA is increased, it can improve the electrothermal performance due to the controllable chip chip welding.

3. The signal transmission delay is small, and the adaptive frequency is greatly improved.

4. Coplanar welding can be used for assembly, greatly improving reliability.

After more than ten years of development, the BGA packaging method has entered the practical stage. In 1987, Japan's Citizen Corporation began to develop chips (ie, BGAs) packaged in plastic ball grid arrays. Later, Motorola, Compaq and other companies also joined the ranks of developing BGA. In 1993, Motorola pioneered the application of BGA to mobile phones. In the same year, Compaq applied it to workstations and PCs. Until five or six years ago, Intel started to use BGA in computer CPUs (ie Pentium II, Pentium III, Pentium IV, etc.) and chipsets (such as i850), which played a role in boosting the expansion of BGA application fields. BGA has become an extremely popular IC packaging technology. Its global market size was 1.2 billion pieces in 2000. It is expected that the market demand in 2005 will increase by more than 70% compared with 2000.

QFP plastic square flat package and PFP plastic flat package

QFP package

QFP (Plastic Quad Flat Package) package has a small distance between the pins of the chip and the pins are very thin. Generally, large-scale or very large-scale integrated circuits use this package, and the number of pins is generally more than 100. Chips packaged in this form must be soldered to the motherboard using SMD (Surface Mount Device Technology). Chips installed with SMD do not need to punch holes in the motherboard. Generally, there are solder joints of corresponding pins on the motherboard surface. Align the pins of the chip with the corresponding solder joints to achieve soldering to the motherboard. Chips soldered in this way are difficult to remove without special tools.

Chips packaged in PFP (Plastic Flat Package) are basically the same as QFP. The only difference is that QFP is generally square, while PFP can be either square or rectangular.

QFP / PFP package has the following characteristics:

1. Suitable for SMD surface mounting technology to install wiring on PCB circuit board.

2. Suitable for high frequency use.

3. Easy operation and high reliability.

4. The ratio between chip area and package area is small.

80286, 80386 and some 486 motherboards in Intel series CPUs use this package.

PGA pin grid array package

The PGA (Pin Grid Array Package) chip package has multiple square matrix pins inside and outside the chip, and each square matrix pin is arranged at a certain distance along the periphery of the chip. Depending on the number of pins, you can make 2-5 turns. During installation, plug the chip into a dedicated PGA socket. In order to make it easier for the CPU to be installed and removed, starting from the 486 chip, a CPU socket named ZIF appeared, which is specially used to meet the requirements of the PGA packaged CPU for installation and removal.

ZIF (Zero Insertion Force Socket) refers to a socket with zero insertion force. Gently lift the wrench on this socket, and the CPU can be easily and easily inserted into the socket. Then press the wrench back to its original position, and use the squeezing force generated by the special structure of the socket itself to firmly contact the pins of the CPU with the socket. There is absolutely no problem of poor contact. When disassembling the CPU chip, simply lift the wrench on the socket to release the pressure and the CPU chip can be easily removed.

The PGA package has the following characteristics:

PGA package

1. The plug-in operation is more convenient and the reliability is high.

2. Can adapt to higher frequencies.

Among Intel series CPUs, 80486, Pentium and Pentium Pro all use this package.

MCM multi-chip module

In order to solve the problem of low integration and insufficient function of a single chip, multiple high-integration, high-performance, high-reliability chips are used on high-density multilayer interconnect substrates to form a variety of electronic module systems. As a result, MCM (Multi Chip Model) multi-chip module system appeared.

MCM has the following characteristics:

1. The package delay time is reduced, which makes it easy to achieve high-speed modules.

2. Reduce the package size and weight of the whole machine / module.

3. The system reliability is greatly improved.

In short, due to the continuous development of CPU and other very large integrated circuits, the packaging form of integrated circuits is constantly adjusted and changed accordingly, and the advancement of packaging form will in turn promote the development of chip technology.

CSP chip size package

With the global demand for personalized and lightweight electronic products, packaging technology has advanced to CSP (Chip Size Package). It reduces the size of the package size of the chip, so that the size of the bare chip can be as large as the package size. That is, the size of the packaged IC side is no more than 1.2 times the chip, and the IC area is only no more than 1.4 times larger than the die.

CSP packages can be divided into four categories:

1. Lead Frame Type (Traditional Lead Frame Form), representative manufacturers include Fujitsu, Yue Li, Rohm, Goldstar and so on.

2. Rigid Interposer Type (rigid interposer type), representing manufacturers such as Motorola, Sony, Toshiba, Panasonic and so on.

3.Flexible Interposer Type (soft interposer type), the most famous of which is Tessera's microBGA, CTS's sim-BGA also uses the same principle. Other representative manufacturers include General Electric (GE) and NEC.

4. Wafer Level Package (Wafer Size Package): Different from the traditional single-chip packaging method, WLCSP is to cut the whole wafer into individual chips. It is known as the future mainstream of packaging technology and has been invested in research and development. The manufacturers include FCT, Aptos, Casio, EPIC, Fujitsu, Mitsubishi Electronics and so on.

The CSP package has the following characteristics:

1. Meets the increasing needs of chip I / O pins.

2. The ratio between chip area and package area is small.

3. Greatly shorten the delay time.

The CSP package is suitable for ICs with a small number of pins, such as memory modules and portable electronic products. In the future, it will be widely used in emerging products such as information appliances (IA), digital television (DTV), e-books, wireless network WLAN / GigabitEthemet, ADSL / mobile phone chips, Bluetooth, etc.