What Are Semiconductor Wafers?

Wafer refers to the silicon wafer used in the manufacture of silicon semiconductor integrated circuits. Because its shape is circular, it is called a wafer; it can be processed and fabricated into various circuit element structures on the silicon wafer, and it becomes an integration with specific electrical functions Circuit products. The original material of the wafer is silicon, and the surface of the earth's crust is inexhaustible of silicon dioxide. Silica ore is refined by electric arc furnace, hydrochloric acid is chlorinated, and after distillation, high-purity polysilicon is produced, and its purity is as high as 99.999999999%.

Wafer is the basic material for manufacturing semiconductor chips. The main raw material of semiconductor integrated circuits is

Wafer surface cleaning

A protective layer of a mixture of Al2O3 and glycerin of about 2 m is attached to the wafer surface, and chemical etching and surface cleaning must be performed before fabrication.

First wafer oxidation

SiO2 buffer layer is generated by thermal oxidation method, which is used to reduce the subsequent stress oxidation of Si3N4 on the wafer: dry oxidation Si (solid) + O2 à SiO2 (solid) and wet oxidation Si (solid) + 2H2O à SiO2 (Solid) + 2H2. Dry oxidation is commonly used to form, gate silicon dioxide films, which require thin, interfacial level and fixed

Wafer

Thin film with low charge density. Film formation by dry oxidation is slower than wet. Wet oxidation is commonly used to form relatively thick silicon dioxide films for device isolation. When the SiO2 film is thin, the film thickness is proportional to time. When the SiO2 film becomes thicker, the film thickness is proportional to the square root of time. Therefore, to form a thicker SiO2 film, a longer oxidation time is required. The speed of SiO2 film formation depends on the number of oxidants such as O2 and OH groups that diffuse through the SiO2 film to the silicon surface. The reason for the wet oxidation is that the diffusion coefficient in the OH-based SiO2 film is larger than that in O2. Oxidation reaction, the surface of Si moves to the deep layer, the distance is 0.44 times the thickness of SiO2 film. Therefore, with different thicknesses of SiO2 films, the depth of the Si surface after removal is also different. The SiO2 film is transparent, and the thickness of the film is estimated by light interference. The period of this interference color is about 200nm. If it is informed in advance how many interferences, it can be correctly estimated. For other transparent films, if you know its refractive index, you can also use the formula to calculate (dSiO2) / (dox) = (nox) / (nSiO2). When the SiO2 film is very thin, no interference color is seen, but the hydrophobicity of Si and the hydrophilicity of SiO2 can be used to determine whether the SiO2 film exists. It can also be measured by interference film meters or ellipsometers. SiO2 and Si interface level density and fixed charge density can be obtained from the capacitance characteristics of MOS diodes. (100) plane Si has the lowest interface level density, which is about 10E + 10-- 10E + 11 / cm? 2.eV-1. At the (100) plane, there are many fixed charges in the oxide film, and the size of the fixed charge density becomes a major factor of the left and right thresholds.

CVD Wafer thermal CVD

Hot CVD (HotCVD) / (thermalCVD). This method is highly productive and has a ladder-like coating property (regardless of unevenness, the surface in deep holes also reacts, and the gas can reach the surface and adhere to the film). Extremely wide. Principles of film formation, such as volatile metal halides (MX) and metal organic compounds (MR) and other gas-phase chemical reactions (thermal decomposition, hydrogen reduction, oxidation, replacement reactions, etc.) at high temperatures on the substrate , Carbide, silicide, boride, high melting point metal, metal, semiconductor and other thin film methods. The use is limited because it only reacts at high temperatures, but because of its field of application, dense, high-purity substance films can be obtained, and the adhesion strength is strong. If carefully controlled, stable films can be easily obtained (short Fiber), etc., so its application range is extremely wide. The thermal CVD method can also be divided into normal pressure and low pressure. Low pressure CVD is suitable for simultaneous processing of multiple substrates, and the pressure is generally controlled between 0.25-2.0 Torr. Polysilicon as the gate electrode is usually SiH4 or Si2H by HCVD. Gas thermal decomposition (about 650oC) deposition. The silicon nitride film used for device isolation by selective oxidation is also produced by low-pressure CVD, using the reaction surface of ammonia and SiH4 or Si2H6. The SiO2 film as interlayer insulation is made of SiH4 and O2 at a temperature of 400-4500oC. It is formed by forming SiH4 + O2-SiO2 + 2H2 or using Si (OC2H5) 4 (TEOS: tetra ethoxy silanc) and O2 at a high temperature of about 750oC. The latter is a SiO2 film formed by TEOS with a stepped side surface coating. Good performance advantages. In the former, PH3 gas is introduced at the same time of deposition to form phosphorous silicate glass (PSG: phosphor silicate glass), and then B2H6 gas is introduced to form a BPSG (borro? Phosphor silicate glass) film. These two thin film materials have good fluidity at high temperatures and are widely used as interlayer insulation films with good surface flatness.

Wafer heat treatment

Before applying the photoresist, the surface of the cleaned substrate is coated with an adhesion enhancer or the substrate is placed in an inert gas for heat treatment. This process is to increase the adhesion between the photoresist and the substrate, prevent the photoresist pattern from falling off during development, and prevent sideetching from occurring during wet etching. The application of the photoresist is performed by a spin-off machine which can be freely set in rotation speed and rotation time. First, the substrate is sucked on the suction cup of the glue-sucking machine by a vacuum suction method, and a photoresist having a certain viscosity is dropped on the surface of the substrate, and then the glue is shaken at a set speed and time. Due to the centrifugal force, the photoresist is evenly spread on the surface of the substrate, and the excess photoresist is thrown away to obtain a certain thickness of photoresist film. The thickness of the photoresist is determined by the viscosity of the photoresist and the photoresist. Speed to control. The so-called photoresist is a material that is sensitive to light, electron beams, or X-rays, has the property of solubility in a developing solution, and has corrosion resistance. Generally speaking, the positive type rubber has high resolution, and the negative type rubber has the characteristics of good sensitivity and good adhesion to the lower layer. The fine pattern (resolution, sharpness) of the photolithography process, and how high the positional accuracy (overprint accuracy) with the graphics of other layers are determined, so there is a good photoresist and a good exposure system.

Wafer back grinding process

For the manufacture of integrated circuits on wafers, in order to reduce the thermal resistance of the device, improve the work heat dissipation and cooling capacity, and facilitate packaging, after the integrated circuits are fabricated on the front side of the silicon wafer, the back surface needs to be thinned. The backside grinding process of the wafer is to attach a film on the front side of the wafer to protect the integrated circuit that has been fabricated, and then use a grinder to reduce the thickness. After grinding and thinning the back of the wafer, a damaged layer will be formed on the surface, and the warpage is high, and it is easy to break. In order to solve these problems, it is necessary to perform wet silicon etching on the back of the wafer, remove the damaged layer, release wafer stress, reduce warpage and roughen the surface. When a slot-type wet machine is used for etching, the front and back of the wafer are in contact with the etching solution, and the film on the front must be resistant to corrosion to protect the integrated circuit on the front. Using a single-machine wet machine, the front side of the wafer is usually protected by the machine, and will not come into contact with the corrosive liquid or corrosive gas, and the film can be etched before being etched ^[2] .

Wafer removal of silicon nitride

Here the silicon nitride is removed by dry oxidation.

Wafer ion implantation

Ion implantation Boron ions (B + 3) are implanted into the substrate through the SiO2 film to form a P-type well. The ion implantation method is a method of accelerating impurity ions using an electric field and implanting them into a silicon substrate. The feature of ion implantation is that it can be precise

The low-concentration impurity distribution that is difficult to obtain by the local diffusion method is controlled. In the manufacture of MOS circuits, the channel isolation for parasitic channels is prevented during the device isolation process, the channel doping for adjusting the threshold voltage, and the formation of wells and source-drain regions of CMOS are doped by ion implantation. The ion implantation method generally ionizes impurities to be doped in a semiconductor in an ion source, and then accelerates the selected ions after mass analysis of the magnetic poles and implants them into the substrate.

Annealing

The photoresist is removed and annealed in a high-temperature furnace to eliminate lattice defects and internal stresses in the wafer to restore the integrity of the lattice. The implanted dopant atoms are diffused to the replacement site, resulting in electrical characteristics.

Remove the silicon nitride layer

The silicon nitride layer is removed with hot phosphoric acid, doped with phosphorus (P + 5) ions, forming an N-type well, and increasing the thickness of the original SiO2 film to prevent the n-type impurities from being implanted into the P-type well in the next step.

Remove the SIO2 layer

Annealing and then removing the SiO2 layer with HF.

Dry oxidation

A dry oxidation method produces a layer of SiO2, and then a layer of silicon nitride is deposited by LPCVD. At this time, the surface of the P-well is lower than the surface level of the N-well due to the growth and etching of the SiO2 layer. Here the SiO2 layer and silicon nitride function as before. The next steps are for the isolation region and the isolation layer between the gate and the crystal plane.

Lithography and Ion Etching

Utilizing photolithography and ion etching techniques, the silicon nitride layer above the lower gate isolation layer is retained.

Wet oxidation

Grow a SiO2 layer that is not protected by silicon nitride to form an isolation region between the PNs.

Generate SIO2 film

Hot phosphoric acid removes silicon nitride, and then uses HF solution to remove SiO2 at the gate isolation layer position, and regenerates a better-quality SiO2 film as a gate oxide layer.

Oxidation

LPCVD deposits a polysilicon layer, and then applies photoresist for photolithography, plasma etching technology, gate structure, and oxidation to form a SiO2 protective layer.

Form source and drain

The surface is coated with photoresist, the photoresist in the P-well region is removed, and arsenic (As) ions are implanted to form the source and drain of the NMOS. In the same way, in the N-well region, B ions are implanted to form the source and drain of the PMOS.

Sediment

A non-doped oxide layer is deposited by PECVD to protect the components and annealed.

Deposition of boron phosphorus doped oxide layer

The SiO2 layer containing boron and phosphorus impurities has a lower melting point. When heated to 800 oC, the boron and phosphorus oxide layer (BPSG) will soften and have flow characteristics, which can make the surface of the wafer primary flat.

Deep processing

The first layer of metal is sputtered using photolithography to leave metal contact holes, and multiple metal films such as titanium + titanium nitride + aluminum + titanium nitride are sputtered. The wiring structure is ion-etched, and a layer of SiO2 dielectric is deposited thereon by PECVD. And use SOG (spin on glass) to make the surface flat and heat to remove the solvent in SOG. A second layer of dielectric is then deposited in preparation for the second layer of metal.

(1) The deposition method of the thin film varies according to its application, and the thickness is usually less than 1um. There are various films such as insulating films, semiconductor films, and metal films. Film deposition methods mainly include chemical vapor deposition (CVD) methods that use chemical reactions and physical phenomena.

PVD (physical vapor deposition) method has two broad categories. CVD methods include epitaxial growth, HCVD, and PECVD. PVD has sputtering method and vacuum evaporation method. Generally speaking, the temperature of PVD is low and there is no problem of poisonous gas; the temperature of CVD is high, it needs to reach 1000 oC to dissociate the gas to produce chemical action. The adhesion of PVD to the surface of the material is worse than that of CVD. PVD is suitable for use in the optoelectronic industry. Most of the metal conductive films used in the semiconductor process are deposited using PVD, while most other insulating films use the more demanding CVD technology. PVD-coated rigid films have high strength and corrosion resistance.

(2) Vacuum evaporation (Evaporation Deposition) A common film-forming method that uses resistance heating, induction heating, or electron beam heating to vaporize and deposit raw materials on a substrate. The average free path length of the molecules (or atoms) of the evaporated raw material (below 10 -4 Pa, up to tens of meters), so it can directly reach the substrate without almost colliding with other molecules in a vacuum. The raw material molecules that reach the substrate do not have the energy of surface movement and immediately condense on the surface of the substrate. Therefore, when a thin film is deposited by a vacuum evaporation method on a stepped surface, generally, the surface coverage (degree of coverage) is not ideal. of. However, if the vacuum of Cramb can be evacuated to ultra-high vacuum (<10-8 torr), and the current is controlled, the to-be-plated substance is vapor-deposited by atom by atom to grow into a so-called molecular beam epitaxial growth (MBE: Molecular Beam Epitaxy) ).

(3) Sputtering Deposition The so-called sputtering is to hit the solid surface with high-speed particles (such as argon ions, etc.),

4004 50mm wafer and Core 2 Duo 300mm wafer

Atoms hit out, and the technology of using this phenomenon to form a thin film is to accelerate the ions in the plasma, hit the raw material target, and deposit the hit target atoms to the surface of the opposite substrate to form a thin film. Compared with the vacuum evaporation method, the sputtering method has the following characteristics: the coverage of the step portion is good, and a large area of homogeneous film can be formed. The formed film can obtain a film with the same composition as the compound target, an insulating film and a high The film of the melting point material, the formed film and the underlying material have good adhesion properties. Therefore, aluminum alloys (Al-Si, Al-Si-Cu) and the like for electrodes and wiring are formed by a sputtering method. The most commonly used sputtering method is to indirectly apply a high-frequency (13.56 MHz) power source to a parallel plate electrode to ionize argon gas (at a pressure of 1 Pa). The atoms sputtered from the target are deposited on the other electrode. On the substrate. In order to increase the film formation speed, a magnetic field is usually used to increase the density of ions. This device is called a magnetron sputter apparatus, which releases the inert argon gas at a high voltage, and then accelerates the attraction zone by the cathode electric field. The positively charged ions impinge on the target at the cathode, punch out the object to be plated, and deposit on the substrate. Generally, the magnetic field is added to increase the free path of the electrons, which can increase the dissociation rate of the gas. If the target is a metal, a DC electric field can be used. If it is non-metal, the positive charge accumulates on the surface of the target, resulting in a positive The ions repel them and cannot continue to attract positive ions, so changing to the RF electric field (because the oscillation frequency of the field changes too quickly, so that the positive ions cannot keep up with the change, and the cathode effect occurs at the RF-in) can solve the problem .

VIA holes identified by lithography

A second layer of metal is deposited and the wiring structure is etched. Then, the PECVD method is used to oxidize the layer and the silicon nitride protective layer.

Lithography and ion etching

Determine the PAD position.

Final annealing

To ensure the integrity and connectivity of the entire Chip.