What is a Voice Response System?

Voice signal processing has been widely used in the field of communication. Digitization of voice transmission is an important link in a fully digital mobile communication system. The combination of high-quality, low-rate voice coding technology and high-efficiency digital modulation technology provides modern mobile communications with system capacity, communication quality, and spectrum utilization better than analog mobile communications. The development of modern mobile communication has also put forward higher requirements on the power consumption of the system, so low-power, high-performance dsp has been more and more widely used in various fields. This article introduces the use of tms320vc5510a recently developed by Texas Instruments (ti) in the United States, using its data processing capabilities and low power consumption characteristics, and combined with msp430f149 to increase the system control capability, real-time implementation of various speech algorithms, for the actual development of speech The processing system has important reference value, and the platform has been applied to actual products.

Speech processing system

There are many kinds of speech algorithms. The front end of the speech processing system is required to provide digital sampling signals that meet the requirements of algorithm accuracy. Therefore, the front end a / d and d / a have high sampling rate and sampling accuracy. The voice processing system also has real-time requirements. In some applications, it is also required that the voice codec algorithm, encryption and decryption algorithm, channel codec algorithm, and even modulation and demodulation algorithms are implemented in the same chip. Therefore, the data processing capacity of the system is required. Strong, large storage space. In a common dsp application system, dsp plus memory, a / d, d / a, and peripheral interfaces can be implemented. However, more and more occasions require the system to complete communication and control with external systems, such as control functions such as man-machine interface and channel transmission equipment. These can use the structure of mcu + dsp to make up for the lack of poor control ability of a single dsp system

The analog voice passes through a band-pass filter formed by the power amplifier, and is converted into a digital signal of 8 000 Hz by an analog-to-digital converter (adc) of tlv320aic10. The accuracy of the sampling signal is 16 bits, and the amplitude of the input analog signal is -3.3 3.3v. The digitized voice signal is transmitted to the internal buffer of dsp (tms320vc5510a) through the synchronous serial port (mcbsp), and is sent to the encoder for encoding. The obtained data stream is transmitted to the terminal through the synchronous serial port (mcbsp) and the channel interface, and is transmitted after channel coding. The bitstream received from the channel is decoded by the terminal and transmitted to the internal buffer of the dsp through the synchronous serial port (mcbsp), and is sent to the decoder for decoding. The digital voice obtained is then transmitted to the analog / digital conversion of the tlv320aic10 through the synchronous serial port (mcbsp). (Adc), convert to analog signal output. In order to enhance the control capability of this hardware platform, dsp (tms320vc5510a) communicates with mcu (msp430f149) through the host interface (hpi). And a memory flash (sst39vf800a) is added to ensure offline operation.

Because MCU has a strong event response capability and DSP has a strong data processing capability, the MCU can dynamically change the system's operating frequency and DSP's working state for different algorithms, thereby reducing system power consumption. For example, running 600, 1 200, and 2 400 bps voice algorithms independently developed by Tsinghua University on this platform requires dynamic configuration for different algorithms requiring different data operations. dsp adopts 8.192mhz clock provided by MCU and multiplies the frequency by dpll integrated on chip to get the required master clock. Because part of the system's code is in the 54 compatible mode, in the main function of the system software, the system can be in a normal state, ie, idle1 or idle2, when encoding and decoding operations are not required. More specific management can be performed using the idle domain mechanism of the c55x series]. The three states are described in detail as follows: no idle: The timer, the universal serial port, and the kernel are all in the normal working mode. idle 1: Normal working mode of timer and general serial port, the kernel is in idle state and wake up by interrupt. idle 2: The timer, the general-purpose serial port, and the kernel are all in the idle state and are awakened by an interrupt. For different algorithms, the minimum system frequency that can guarantee the algorithm's operation is different due to the required amount of data operation. By dynamically adjusting the working state of the system for different data operation requirements, the purpose of reducing power consumption can be achieved to the maximum, thereby achieving power consumption control for different operation amounts. In actual use, when dsp: running 600selp algorithm, the system works at 32.768mhz; when running 1 200selp algorithm, the system works at 40.960mhz; when running 2 400selp algorithm, the system works at 24.576mhz. Compared with a single operation at 81.92mhz, the system power consumption is reduced by 41%, 36%, and 48%, which greatly reduces the system power consumption. The hardware platform has successfully run algorithms such as g.723.1, g.729a / b, and cvsd, and has achieved good results, and has broad application prospects.